1. Field of the Invention
The present invention relates to a semiconductor memory device.
2. Related Art
FeRAMs (Ferroelectric Random Access Memories) are nonvolatile memories and destructive read-out type memories. Thus, during data read operations, after data is read from memory cells, the data must be restored surely in the memory cells in the FeRAM. In the data read of the FeRAM, a chip enable signal (bCE) is activated (logical low) while a write enable signal (bWE) is in an inactivated state (logical high). The FeRAM then enters the read operation. When the write enable signal (bWE) becomes activated (logical low) thereafter, however, the FeRAM enters a write operation. If such an operation is made in the FeRAM, the data is temporarily read from the memory cells and external data is waited to be inputted before the read data is restored. When the data is externally inputted to the FeRAM during the standby period, the externally inputted data is written in the memory cells. When the data is not inputted externally during the standby period, the read data is written back to the memory cells.
If power supplies suddenly shut down while the FeRAM waits the external data to be inputted, both the externally inputted data and the read data may not be written in the memory cells.
Such a problem also arises in memories operating in a burst mode that data is serially read from or written in a plurality of columns. The same problem occurs in the series connected TC unit type ferroelectric RAM.